Volume 2, Issue 6 (Dec 2004)
DISTRIBUTED COMPUTING ISSUE
 Home :  Feedback
   Browse   
Search  in
 

DESIGN OF A GRID-ENABLED LOW-COST SUPERCOMPUTER WITH MASSIVELY PARALLEL ACCELERATORS
Principal Investigator: Bertil Schmidt
Hybrid computing describes the combination of fine-grained and coarse-grained parallelism within an architecture, e.g. within the processors of a loosely coupled computational grid, tightly coupled massively parallel processor arrays are embedded in order to accelerate compute-intensive tasks. The driving force and motivation behind hybrid computing is the price/performance ratio. Using a computational grid consisting of several geographically distributed Beowulf PC-clusters is currently one of the most efficient and simple ways to gain supercomputer power for a reasonable price. Installing in addition massively parallel accelerators within several PCs can further improve the cost/performance ratio significantly. The strategy to high performance computing used in this project is based on low-cost accelerators that are easily upgradeable: Field Programmable Gate Arrays (FPGAs) and Graphics Processing Units (GPUs). FPGAs provide a flexible platform for fine-grained parallel computing based on reconfigurable hardware, while modern GPUs are based on programmable parallel stream processor architectures. Since there is a large overall FPGA and GPU market, this approach has a relatively small price per unit and also facilitates upgrading to state-of-the-art technology. These accelerators can be used as special resources in a computational grid. An initial prototype based on a computational grid with FPGAs is currently set-up between Ngee Ann Polytechnic, NTU and Bioinformatics Institute (BII) for biological sequence analysis (see Figure). As part of this project, additional applications will be developed for medical imaging and simulation of large physical structures (e.g. molecular dynamics). Other parts of the project include adapting existing algorithms to reconfigurable and stream architectures, development of load balancing and scheduling algorithms on the grid and the design of programming tools. “A Grid-enabled low-cost Supercomputer.” Principal Investigator: Bertil Schmidt E-mail: asbschmidt@ntu.edu.sg Biological multiple sequence alignment on the grid-enabled high-performance architecture. The compute-intensive Stage 2 is executed on FPGA boards. A single FPGA chip can achieve a speedup factor of more than 100 compared to a Pentium IV.
PRINT ARTICLE | EMAIL ARTICLE TO FRIEND
Dec2004

  • NANYANG CAMPUS GRID Accounting System
  • DESIGN OF A GRID-ENABLED LOW-COST SUPERCOMPUTER WITH MASSIVELY PARALLEL ACCELERATORS
  • MCCF: A Distributed Grid Job Workflow Execution Framework
  • AN INTEGRATED AND ADAPTIVE DECISION SUPPORT FRAMEWORK FOR HIGH-TECH MANUFACTURING AND SERVICE NETWORKS
  • DELTA: A VIRTUAL TRAINING ENVIRONMENT FOR MOUT
  • TIME-CONSTRAINED DATA BROADCAST SCHEDULING
  • COLLABORATIVE OFFICE DOCUMENT EDITING AND REVISION CONTROL
  • DS-Grid: Large Scale Distributed Simulation on the Grid
    •   Best viewed with Microsoft IE 6.0 and Netscape 6.0 and above
    Copyright© NTU School of Computer Engineering    | NTU Home | Manage My Subscription